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» Design and implementation of network puzzles
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FPGA
2009
ACM
201views FPGA» more  FPGA 2009»
15 years 12 months ago
A high-performance FPGA architecture for restricted boltzmann machines
Despite the popularity and success of neural networks in research, the number of resulting commercial or industrial applications have been limited. A primary cause of this lack of...
Daniel L. Ly, Paul Chow
ACSAC
2009
IEEE
15 years 12 months ago
Privacy through Noise: A Design Space for Private Identification
To protect privacy in large systems, users must be able to authenticate against a central server without disclosing their identity to the network. Private identification protocols ...
Karsten Nohl, David Evans
FPL
2009
Springer
99views Hardware» more  FPL 2009»
15 years 9 months ago
Exploiting fast carry-chains of FPGAs for designing compressor trees
Fast carry chains featuring dedicated adder circuitry is a distinctive feature of modern FPGAs. The carry chains bypass the general routing network and are embedded in the logic b...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
AEI
1999
134views more  AEI 1999»
15 years 4 months ago
Automatic design synthesis with artificial intelligence techniques
Design synthesis represents a highly complex task in the field of industrial design. The main difficulty in automating it is the definition of the design and performance spaces, i...
Francisco J. Vico, Francisco J. Veredas, Jos&eacut...
DATE
2008
IEEE
89views Hardware» more  DATE 2008»
15 years 11 months ago
Symbolic Reliability Analysis and Optimization of ECU Networks
Increasing reliability at a minimum amount of extra cost is a major challenge in todays ECU network design. Considering reliability as an objective already in early design phases ...
Michael Glaß, Martin Lukasiewycz, Felix Reim...