275 search results - page 10 / 55 » Design for Verification of SystemC Transaction Level Models |
151
click to vote
FDL
2004
IEEE
15 years 1 months ago
2004
IEEE
gn process of embedded systems moves currently towards higher levels of abstraction. As a consequence, a need arises for an early and realistic assessment of system level design d...
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
This paper evaluates the use of pin and cycle accurate SystemC models for embedded system design exploration and early software development. The target system is MicroBlaze Vanill...
85
Voted
ICCAD
2008
IEEE
15 years 6 months ago
2008
IEEE
—SystemC is a system-level modeling language that offers a wide range of features to describe concurrent systems rent levels of abstraction. The SystemC standard permits simulato...
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
- Early estimation of the execution time of Real-Time embedded SW is an essential task in complex, HW/SW embedded system design. Application SW execution time estimation requires t...
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...