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DAC
2010
ACM
14 years 10 months ago
Non-uniform clock mesh optimization with linear programming buffer insertion
Clock meshes are extremely effective at filtering clock skew from environmental and process variations. For this reason, clock meshes are used in most high performance designs. Ho...
Matthew R. Guthaus, Gustavo Wilke, Ricardo Reis
87
Voted
CORR
2010
Springer
121views Education» more  CORR 2010»
14 years 11 months ago
Mechanism Design via Correlation Gap
For revenue and welfare maximization in singledimensional Bayesian settings, Chawla et al. (STOC10) recently showed that sequential posted-price mechanisms (SPMs), though simple i...
Qiqi Yan
93
Voted
DAC
2007
ACM
16 years 1 months ago
Optimal Selection of Voltage Regulator Modules in a Power Delivery Network
High efficiency low voltage DC-DC conversion is a key enabler to the design of power-efficient integrated circuits. Typically a star configuration of the DC-DC converters, where o...
Behnam Amelifard, Massoud Pedram
127
Voted
SLIP
2009
ACM
15 years 7 months ago
Through-silicon-via aware interconnect prediction and optimization for 3D stacked ICs
Individual dies in 3D integrated circuits are connected using throughsilicon-vias (TSVs). TSVs not only increase manufacturing cost, but also incur silicon area, delay, and power ...
Dae Hyun Kim, Saibal Mukhopadhyay, Sung Kyu Lim
94
Voted
HPCA
2002
IEEE
16 years 1 months ago
Power Issues Related to Branch Prediction
This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy ...
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Marco B...