Nanodevices based circuit design will be based on the acceptance that a high percentage of devices in the design will be defective. In this work, we investigate a defect tolerant ...
Aiman H. El-Maleh, Bashir M. Al-Hashimi, Aissa Mel...
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerso...
Network protocols are typically designed and tested individually. In practice, however, applications use multiple protocols concurrently. This discrepancy can lead to failures fro...
Jung Il Choi, Maria A. Kazandjieva, Mayank Jain, P...
In modular testing of system-on-a-chip (SoC), test access mechanisms (TAMs) are used to transport test data between the input/output pins of the SoC and the cores under test. Prio...
The reliability of future processors is threatened by decreasing transistor robustness. Current architectures focus on delivering high performance at low cost; lifetime device rel...
Andrea Pellegrini, Joseph L. Greathouse, Valeria B...