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» Design of Neuromorphic Hardwares
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ISCAS
2005
IEEE
143views Hardware» more  ISCAS 2005»
15 years 7 months ago
Design and FPGA implementation of a structure of evolutionary digital filters for hardware implementation
— In this paper, we design and implement an improved hardware-based evolutionary digital filter (EDF) version 2. The EDF is an adaptive digital filter which is controlled by ad...
Masahide Abe, Hiroki Arai, Masayuki Kawamata
DAC
1996
ACM
15 years 6 months ago
A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
Nguyen-Ngoc Bình, Masaharu Imai, Akichika S...
ICASSP
2008
IEEE
15 years 8 months ago
Parameterized design framework for hardware implementation of particle filters
Particle filtering methods provide powerful techniques for solving non-linear state-estimation problems, and are applied to a variety of application areas in signal processing. Be...
Sankalita Saha, Neal K. Bambha, Shuvra S. Bhattach...
87
Voted
DATE
2007
IEEE
112views Hardware» more  DATE 2007»
15 years 8 months ago
Compact hardware design of Whirlpool hashing core
Weaknesses have recently been found in the widely used cryptographic hash functions SHA-1 and MD5. A potential alternative for these algorithms is the Whirlpool hash function, whi...
Timo Alho, Panu Hämäläinen, Marko H...
130
Voted
ASAP
2000
IEEE
184views Hardware» more  ASAP 2000»
15 years 6 months ago
Tradeoff Analysis and Architecture Design of a Hybrid Hardware/Software Sorter
Sorting long sequences of keys is a problem that occurs in many different applications. For embedded systems, a uniprocessor software solution is often not applicable due to the l...
Marcus Bednara, Oliver Beyer, Jürgen Teich, R...