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Publication
165views
13 years 3 months ago
Task scheduling algorithm for multicore processor system for minimizing recovery time in case of single node fault
In this paper, we propose a task scheduling algorithm for a multicore processor system which reduces the recovery time in case of a single fail-stop failure of a multicore processo...
Shohei Gotoda, Naoki Shibata and Minoru Ito

Presentation
324views
13 years 3 months ago
Task scheduling algorithm for multicore processor system for minimizing recovery time in case of single node fault
In this paper, we propose a task scheduling al-gorithm for a multicore processor system which reduces the recovery time in case of a single fail-stop failure of a multicore process...
DAC
1996
ACM
15 years 1 months ago
A Register File and Scheduling Model for Application Specific Processor Synthesis
In this paper, we outline general design steps of our synthesis tool to realize application specific co-processors such that for a given scientific application having intensive ite...
Ehat Ercanli, Christos A. Papachristou
ARITH
2007
IEEE
15 years 4 months ago
A New Architecture For Multiple-Precision Floating-Point Multiply-Add Fused Unit Design
The floating-point multiply-add fused (MAF) unit sets a new trend in the processor design to speed up floatingpoint performance in scientific and multimedia applications. This ...
Libo Huang, Li Shen, Kui Dai, Zhiying Wang
ICPADS
2008
IEEE
15 years 4 months ago
Adapting Experiments of Embedded System Curriculum Designed Based on Embedded IA to Atom
As the rapidly development of embedded systems, it is a challenge for universities to fill the gap between education and industry. In this paper, we introduce the experiment desig...
Wei Hu, Nick Bao, Like Yan, Tianzhou Chen, Qingson...