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» Design of the MUC-6 evaluation
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QEST
2010
IEEE
14 years 9 months ago
Automatic Compositional Reasoning for Probabilistic Model Checking of Hardware Designs
Adaptive techniques like voltage and frequency scaling, process variations and the randomness of input data contribute signi cantly to the statistical aspect of contemporary hardwa...
Jayanand Asok Kumar, Shobha Vasudevan
CHI
2005
ACM
15 years 11 months ago
Interaction design for literature-based discovery
Rapid growth in the scientific literature makes it increasingly difficult for scientists to keep abreast of findings outside their own narrowing fields of expertise. To help biome...
Meredith M. Skeels, Kiera Henning, Meliha Yetisgen...
ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
15 years 4 months ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
HPCA
2009
IEEE
15 years 12 months ago
Design and implementation of software-managed caches for multicores with local memory
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
Sangmin Seo, Jaejin Lee, Zehra Sura
ASIACRYPT
2009
Springer
15 years 6 months ago
A Modular Design for Hash Functions: Towards Making the Mix-Compress-Mix Approach Practical
The design of cryptographic hash functions is a very complex and failure-prone process. For this reason, this paper puts forward a completely modular and fault-tolerant approach to...
Anja Lehmann, Stefano Tessaro