Sciweavers

    5672 search results - page 12 / 1135
    » Design techniques for low-power systems
    Sort
    View
    DAC
    1996
    ACM
    94views Computer Architecture» more  DAC 1996»
    Opportunities and Obstacles in Low-Power System-Level CAD
    15 years 3 months ago
    Opportunities and Obstacles in Low-Power System-Level CAD
    Download  www.cs.york.ac.uk
    A case study in low-power system-level design is presented. We detail the design of a low-power embedded system, a touchscreen interface device for a personal computer. This devic...
    Andrew Wolfe
    claim paper
    Read More »
    ISLPED
    2009
    ACM
    134views Hardware» more  ISLPED 2009»
    The design of a bloom filter hardware accelerator for ultra low power systems
    15 years 6 months ago
    The design of a bloom filter hardware accelerator for ultra low power systems
    Download  www.eecs.harvard.edu
    Michael J. Lyons, David Brooks
    claim paper
    Read More »
    SLIP
    2004
    ACM
    63views Computer Networks» more  SLIP 2004»
    A low power approach to system level pipelined interconnect design
    15 years 5 months ago
    A low power approach to system level pipelined interconnect design
    Download  www.sliponline.org
    Vikas Chandra, Anthony Xu, Herman Schmit
    claim paper
    Read More »
    ISWC
    2003
    IEEE
    99views Human Computer Interaction» more  ISWC 2003»
    SoundButton: Design of a Low Power Wearable Audio Classification System
    15 years 5 months ago
    SoundButton: Design of a Low Power Wearable Audio Classification System
    Download  luci.ics.uci.edu
    Mathias Stäger, Paul Lukowicz, Niroshan Perer...
    claim paper
    Read More »
    ASPDAC
    2000
    ACM
    95views Hardware» more  ASPDAC 2000»
    FSM decomposition by direct circuit manipulation applied to low power design
    15 years 4 months ago
    FSM decomposition by direct circuit manipulation applied to low power design
    Download  www.cs.york.ac.uk
    Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
    José C. Monteiro, Arlindo L. Oliveira
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2025, USA.