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ISLPED
2005
ACM
147views Hardware» more  ISLPED 2005»
15 years 8 months ago
System level power and performance modeling of GALS point-to-point communication interfaces
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...
Koushik Niyogi, Diana Marculescu
PARELEC
2002
IEEE
15 years 8 months ago
Boosting the Performance of Electromagnetic Simulations on a PC-Cluster
One of the crucial aspects in the design process of high voltage apparatus is the precise simulation of the electrostatic and/or electromagnetic £eld distribution in three dimens...
Carsten Trinitis, Martin Schulz, Wolfgang Karl
WCW
2004
Springer
15 years 8 months ago
Bottlenecks and Their Performance Implications in E-commerce Systems
Abstract. We present a detailed workload characterization of a multi-tiered system that hosts an e-commerce site. Using the TPC-W workload and via experimental measurements, we ill...
Qi Zhang, Alma Riska, Erik Riedel, Evgenia Smirni
HPCA
2001
IEEE
16 years 3 months ago
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design
In this papel; we address the severe performance gap caused by high processor clock rates and slow DRAM accesses. We show that even with an aggressive, next-generation memory syst...
Wei-Fen Lin, Steven K. Reinhardt, Doug Burger
RTAS
2005
IEEE
15 years 8 months ago
Applying Sensitivity Analysis in Real-Time Distributed Systems
During real-world design of embedded real-time systems, it cannot be expected that all performance data required for scheduling analysis is fully available up front. In such situa...
Razvan Racu, Marek Jersak, Rolf Ernst