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DAC
1996
ACM
15 years 2 months ago
Sizing of Clock Distribution Networks for High Performance CPU Chips
: In a high performance microprocessor such as Digital's 300MHz Alpha 21164, the distribution of a high quality clock signal to all regions of the device is achieved using a c...
Madhav P. Desai, Radenko Cvijetic, James Jensen
IJHPCA
2007
165views more  IJHPCA 2007»
14 years 9 months ago
High Performance Development for High End Computing With Python Language Wrapper (PLW)
This paper presents a design and implementation of a system that leverages interactive scripting environment to the needs of scientific computing. The system allows seamless tran...
Piotr Luszczek, Jack Dongarra
IPPS
1996
IEEE
15 years 2 months ago
Benefits of Processor Clustering in Designing Large Parallel Systems: When and How?
Advances in multiprocessor interconnect technologyare leading to high performance networks. However, software overheadsassociated with message passing are limiting the processors ...
Debashis Basak, Dhabaleswar K. Panda, Mohammad Ban...
IROS
2009
IEEE
173views Robotics» more  IROS 2009»
15 years 4 months ago
Biologically inspired compliant control of a monopod designed for highly dynamic applications
— In this paper the compliant low level control of a biologically inspired control architecture suited for bipedal dynamic walking robots is presented. It consists of elastic mec...
Sebastian Blank, Thomas Wahl, Tobias Luksch, Karst...
IEEEPACT
2003
IEEE
15 years 3 months ago
Design Trade-Offs in High-Throughput Coherence Controllers
Recent research shows that the high occupancy of Coherence Controllers (CCs) is a major performance bottleneck in scalable shared-memory multiprocessors. In this paper, we propose...
Anthony-Trung Nguyen, Josep Torrellas