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HPCA
1997
IEEE
15 years 9 months ago
Datapath Design for a VLIW Video Signal Processor
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S....
CLUSTER
2007
IEEE
15 years 11 months ago
Balancing productivity and performance on the cell broadband engine
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vett...
WWIC
2005
Springer
197views Communications» more  WWIC 2005»
15 years 10 months ago
Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications
The needs for run-time data storage in modern wired and wireless network applications are increasing. Additionally, the nature of these applications is very dynamic, resulting in ...
Stylianos Mamagkakis, Christos Baloukas, David Ati...
INFOCOM
2009
IEEE
15 years 11 months ago
On the Impact of Heterogeneity and Back-End Scheduling in Load Balancing Designs
—Load balancing is a common approach for task assignment in distributed architectures. In this paper, we show that the degree of inefficiency in load balancing designs is highly...
Ho-Lin Chen, Jason R. Marden, Adam Wierman
VRST
2005
ACM
15 years 10 months ago
Human performance in space telerobotic manipulation
This paper considers the utility of VR in the design of the interface to a space-based telerobotic manipulator. An experiment was conducted to evaluate the potential for improved ...
Philip Lamb, Dean Owen