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181
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FAST
2011
14 years 9 months ago
Consistent and Durable Data Structures for Non-Volatile Byte-Addressable Memory
The predicted shift to non-volatile, byte-addressable memory (e.g., Phase Change Memory and Memristor), the growth of “big data”, and the subsequent emergence of frameworks su...
Shivaram Venkataraman, Niraj Tolia, Parthasarathy ...
HPDC
2010
IEEE
15 years 7 months ago
Lessons learned from moving earth system grid data sets over a 20 Gbps wide-area network
In preparation for the Intergovernmental Panel on Climate Change (IPCC) Fifth Assessment Report, the climate community will run the Coupled Model Intercomparison Project phase 5 (...
Rajkumar Kettimuthu, Alex Sim, Dan Gunter, Bill Al...
ICS
2003
Tsinghua U.
15 years 11 months ago
PowerHerd: dynamic satisfaction of peak power constraints in interconnection networks
Power consumption is a critical issue in interconnection network design, driven by power-related design constraints, such as thermal and power delivery design. Usually, off-line w...
Li Shang, Li-Shiuan Peh, Niraj K. Jha
IEEEPACT
2005
IEEE
15 years 11 months ago
Maximizing CMP Throughput with Mediocre Cores
In this paper we compare the performance of area equivalent small, medium, and large-scale multithreaded chip multiprocessors (CMTs) using throughput-oriented applications. We use...
John D. Davis, James Laudon, Kunle Olukotun
193
Voted
ISCA
2012
IEEE
260views Hardware» more  ISCA 2012»
13 years 8 months ago
A case for exploiting subarray-level parallelism (SALP) in DRAM
Modern DRAMs have multiple banks to serve multiple memory requests in parallel. However, when two requests go to the same bank, they have to be served serially, exacerbating the h...
Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Li...