Sciweavers

1155 search results - page 196 / 231
» Designing Benchmarks for P2P Systems
Sort
View
ISPASS
2010
IEEE
15 years 11 months ago
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
Harold W. Cain, Priya Nagpurkar
ICS
2009
Tsinghua U.
15 years 11 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
CCGRID
2009
IEEE
15 years 11 months ago
Improving Parallel Write by Node-Level Request Scheduling
In a cluster of multiple processors or cpu-cores, many processes may run on each compute node. Each process tends to issue contiguous I/O requests for snapshot, checkpointing or s...
Kazuki Ohta, Hiroya Matsuba, Yutaka Ishikawa
ADC
2009
Springer
113views Database» more  ADC 2009»
15 years 10 months ago
Ranking-Constrained Keyword Sequence Extraction from Web Documents
Given a large volume of Web documents, we consider problem of finding the shortest keyword sequences for each of the documents such that a keyword sequence can be rendered to a g...
Ding-Yi Chen, Xue Li, Jing Liu, Xia Chen
IEEEPACT
2008
IEEE
15 years 10 months ago
A tuning framework for software-managed memory hierarchies
Achieving good performance on a modern machine with a multi-level memory hierarchy, and in particular on a machine with software-managed memories, requires precise tuning of progr...
Manman Ren, Ji Young Park, Mike Houston, Alex Aike...