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MSS
2005
IEEE
133views Hardware» more  MSS 2005»
15 years 4 months ago
Exporting Storage Systems in a Scalable Manner with pNFS
To meet enterprise and grand challenge-scale performance and interoperability requirements, a group of engineers—initially ad-hoc but now integrated into the IETF—is designing...
Dean Hildebrand, Peter Honeyman
CODES
2000
IEEE
15 years 3 months ago
A method to derive application-specific embedded processing cores
The concept of system-on-a-chip is becoming increasingly popular for the integration of complex systems. New types of processor cores are now available that enable the designer to...
Olivier Hébert, Ivan C. Kraljic, Yvon Savar...
FPGA
2010
ACM
250views FPGA» more  FPGA 2010»
15 years 8 months ago
Variation-aware placement for FPGAs with multi-cycle statistical timing analysis
Deep submicron processes have allowed FPGAs to grow in complexity and speed. However, such technology scaling has caused FPGAs to become more susceptible to the effects of process...
Gregory Lucas, Chen Dong, Deming Chen
EMSOFT
2005
Springer
15 years 4 months ago
Pinapa: an extraction tool for SystemC descriptions of systems-on-a-chip
SystemC is becoming a de-facto standard for the description of complex systems-on-a-chip. It enables system-level descriptions of SoCs: the same language is used for the descripti...
Matthieu Moy, Florence Maraninchi, Laurent Maillet...
LCPC
2005
Springer
15 years 4 months ago
Software Thread Level Speculation for the Java Language and Virtual Machine Environment
Thread level speculation (TLS) has shown great promise as a strategy for fine to medium grain automatic parallelisation, and in a hardware context techniques to ensure correct TLS...
Christopher J. F. Pickett, Clark Verbrugge