377 search results - page 12 / 76 » Designing a DHT for Low Latency and High Throughput |
FCCM
2009
IEEE
15 years 1 months ago
2009
IEEE
FPGA has long been considered an attractive platform for high performance implementations of string matching. However, as the size of pattern dictionaries continues to grow, such ...
ISPD
2010
ACM
15 years 4 months ago
2010
ACM
As the thermal wall becomes the dominant factor limiting VLSI circuit performance, and the interconnect wires become the primary power consumer, power efficiency of onchip data th...
HPCC
2007
Springer
15 years 3 months ago
2007
Springer
RWAPI is a low-level communication interface designed for clusters of PCs. It has been developed to provide performance to higher applications on a wide variety of architectures. W...
ANCS
2009
ACM
14 years 7 months ago
2009
ACM
Local interconnect architectures are at a cusp in which advances in throughput have come at the expense of power and latency. Moreover, physical limits imposed on dissipation and ...
IPPS
1998
IEEE
15 years 1 months ago
1998
IEEE
Abstract. High speed networks are now providing incredible performances. Software evolution is slow and the old protocol stacks are no longer adequate for these kind of communicati...