377 search results - page 13 / 76 » Designing a DHT for Low Latency and High Throughput |
CLUSTER
2008
IEEE
15 years 4 months ago
2008
IEEE
—Remote atomic memory operations are critical for achieving high-performance synchronization in tightly-coupled systems. Previous approaches to implementing atomic memory operati...
ICCD
2007
IEEE
15 years 6 months ago
2007
IEEE
As chip multiprocessors (CMPs) become the only viable way to scale up and utilize the abundant transistors made available in current microprocessors, the design of on-chip network...
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NOCS
2009
IEEE
15 years 4 months ago
2009
IEEE
While NoCs are efficient in delivering high throughput point-to-point traffic, their multi-hop operation is too slow for latency sensitive signals. In addition, NoCS are inefficie...
FPGA
2007
ACM
15 years 3 months ago
2007
ACM
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
INFOCOM
2006
IEEE
15 years 3 months ago
2006
IEEE
— We present Sieve – an infrastructure for fast content-based data distribution to interested users. The ability of Sieve to filter and forward high-bandwidth data streams ste...