In this paper, we propose a new internally buffered crossbar (IBC) switching architecture where the input and output distributed schedulers are embedded inside the crossbar fabric...
Lotfi Mhamdi, Christopher Kachris, Stamatis Vassil...
— Market and customer demands have continued to push the limits of CMOS performance. At-speed test has become a common method to ensure these high performance chips are being shi...
Jeremy Lee, Sumit Narayan, Mike Kapralos, Mohammad...
This paper presents the design and implementation of a Sliding Memory Plane (SliM) Array Processor, a mesh-connected SIMD architecture. To build the array processor, we developed ...
ended abstract summarizes the research presented in Dr. Pardoe’s recently-completed Ph.D. thesis [Pardoe 2011]. The thesis considers how adaptive trading agents can take advantag...
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...