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ASPDAC
2008
ACM
164views Hardware» more  ASPDAC 2008»
15 years 1 months ago
The Shining embedded system design methodology based on self dynamic reconfigurable architectures
Complex design, targeting System-on-Chip based on reconfigurable architectures, still lacks a generalized methodology allowing both the automatic derivation of a complete system s...
Carlo Curino, Luca Fossati, Vincenzo Rana, Frances...
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
15 years 6 months ago
A multi-core debug platform for NoC-based systems
Network-on-Chip (NoC) is generally regarded as the most promising solution for the future on-chip communication scheme in gigascale integrated circuits. As traditional debug archi...
Shan Tang, Qiang Xu
CARDIS
2008
Springer
113views Hardware» more  CARDIS 2008»
15 years 1 months ago
The Trusted Execution Module: Commodity General-Purpose Trusted Computing
This paper introduces the Trusted Execution Module (TEM); a high-level specification for a commodity chip that can execute usersupplied procedures in a trusted environment. The TEM...
Victor Costan, Luis F. G. Sarmenta, Marten van Dij...
DAC
1996
ACM
15 years 4 months ago
FADIC: Architectural Synthesis applied in IC Design
This paper discusses the design of a chip using architectural synthesis. The chip, FADIC, is applied in Digital Audio Broadcasting (DAB) receivers. It shows that architectural syn...
J. Huisken, F. Welten
CAV
2008
Springer
99views Hardware» more  CAV 2008»
15 years 1 months ago
Functional Verification of Power Gated Designs by Compositional Reasoning
Power gating is a technique for low power design in which whole sections of the chip are powered off when they are not needed, and powered back on when they are. Functional correct...
Cindy Eisner, Amir Nahir, Karen Yorav