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BMCBI
2004
169views more  BMCBI 2004»
15 years 4 months ago
A power law global error model for the identification of differentially expressed genes in microarray data
Background: High-density oligonucleotide microarray technology enables the discovery of genes that are transcriptionally modulated in different biological samples due to physiolog...
Norman Pavelka, Mattia Pelizzola, Caterina Vizzard...
ET
2002
122views more  ET 2002»
15 years 3 months ago
Using At-Speed BIST to Test LVDS Serializer/Deserializer Function
LVDS is the acronym for Low-Voltage-DifferentialSignaling and is described in both the ANSI/TIA/EIA644 and IEEE 1596.3 standards. High performance yet Low Power and EMI have made ...
Magnus Eckersand, Fredrik Franzon, Ken Filliter
DSD
2010
IEEE
112views Hardware» more  DSD 2010»
15 years 2 months ago
Re-NUCA: Boosting CMP Performance Through Block Replication
— Chip Multiprocessor (CMP) systems have become the reference architecture for designing micro-processors, thanks to the improvements in semiconductor nanotechnology that have co...
Pierfrancesco Foglia, Cosimo Antonio Prete, Marco ...
PVLDB
2010
172views more  PVLDB 2010»
15 years 2 months ago
Secure Personal Data Servers: a Vision Paper
An increasing amount of personal data is automatically gathered and stored on servers by administrations, hospitals, insurance companies, etc. Citizen themselves often count on in...
Tristan Allard, Nicolas Anciaux, Luc Bouganim, Yan...
154
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TPDS
2010
174views more  TPDS 2010»
15 years 2 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra