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MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
14 years 12 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
TVLSI
2008
164views more  TVLSI 2008»
14 years 11 months ago
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
AAAI
2007
15 years 2 months ago
An Ironing-Based Approach to Adaptive Online Mechanism Design in Single-Valued Domains
Online mechanism design considers the problem of sequential decision making in a multi-agent system with self-interested agents. The agent population is dynamic and each agent has...
David C. Parkes, Quang Duong
IEEEPACT
2008
IEEE
15 years 6 months ago
Leveraging on-chip networks for data cache migration in chip multiprocessors
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
Noel Eisley, Li-Shiuan Peh, Li Shang
GLOBECOM
2009
IEEE
15 years 3 months ago
Efficient Multicast Support in Buffered Crossbars using Networks on Chip
The Internet growth coupled with the variety of its services is creating an increasing need for multicast traffic support by backbone routers and packet switches. Recently, buffere...
Iria Varela Senin, Lotfi Mhamdi, Kees Goossens