4394 search results - page 91 / 879 » Designing agent chips |
118
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ASPDAC
2009
ACM
15 years 1 months ago
2009
ACM
We have developed a new 3-dimensional stacking technology using wafer-to-wafer stacked method and evaluated the connectivity between TSV and micro-bump. The prototype 3-layer stac...
163
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ISLPED
2005
ACM
15 years 9 months ago
2005
ACM
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
115
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ICCAD
2008
IEEE
16 years 21 days ago
2008
IEEE
In this paper, we propose a new architecture-level parameterized transient thermal behavioral modeling algorithm for emerging thermal related design and optimization problems for ...
137
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IEEEPACT
2008
IEEE
15 years 10 months ago
2008
IEEE
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
146
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ICS
2007
Tsinghua U.
15 years 10 months ago
2007
Tsinghua U.
This paper presents Cooperative Cache Partitioning (CCP) to allocate cache resources among threads concurrently running on CMPs. Unlike cache partitioning schemes that use a singl...