Sciweavers

1993 search results - page 261 / 399
» Designing and Building Parallel Program
Sort
View
152
Voted
ICPADS
2010
IEEE
15 years 10 days ago
Data-Aware Task Scheduling on Multi-accelerator Based Platforms
To fully tap into the potential of heterogeneous machines composed of multicore processors and multiple accelerators, simple offloading approaches in which the main trunk of the ap...
Cédric Augonnet, Jérôme Clet-O...
115
Voted
IEEEPACT
2008
IEEE
15 years 8 months ago
A tuning framework for software-managed memory hierarchies
Achieving good performance on a modern machine with a multi-level memory hierarchy, and in particular on a machine with software-managed memories, requires precise tuning of progr...
Manman Ren, Ji Young Park, Mike Houston, Alex Aike...
127
Voted
LCPC
2007
Springer
15 years 8 months ago
Using ZBDDs in Points-to Analysis
Binary Decision Diagrams (BDDs) have recently become widely accepted as a space-efficient method of representing relations in points-to analyses. When BDDs are used to represent re...
Ondrej Lhoták, Stephen Curial, José ...
ASPLOS
1991
ACM
15 years 6 months ago
NUMA Policies and Their Relation to Memory Architecture
Multiprocessor memory reference traces provide a wealth of information on the behavior of parallel programs. We have used this information to explore the relationship between kern...
William J. Bolosky, Michael L. Scott, Robert P. Fi...
ICFP
2002
ACM
16 years 2 months ago
Tagless staged interpreters for typed languages
Multi-stage programming languages provide a convenient notation for explicitly staging programs. Staging a definitional interpreter for a domain specific language is one way of de...
Emir Pasalic, Walid Taha, Tim Sheard