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CCGRID
2010
IEEE
15 years 8 months ago
Designing Accelerator-Based Distributed Systems for High Performance
Abstract--Multi-core processors with accelerators are becoming commodity components for high-performance computing at scale. While accelerator-based processors have been studied in...
M. Mustafa Rafique, Ali Raza Butt, Dimitrios S. Ni...
TE
2010
104views more  TE 2010»
15 years 1 months ago
Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum
Abstract--As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used i...
Scott C. Smith, Waleed Al-Assadi, Jia Di
ARC
2009
Springer
165views Hardware» more  ARC 2009»
16 years 2 months ago
Optimizing the Control Hierarchy of an ECC Coprocessor Design on an FPGA Based SoC Platform
Abstract. Most hardware/software codesigns of Elliptic Curve Cryptography only have one central control unit, typically a 32 bit or 8 bit processor core. With the ability of integr...
Xu Guo, Patrick Schaumont
INFOCOM
2006
IEEE
16 years 1 months ago
Capacity-Constrained Design of Resilient Multi-Tier Wireless Mesh Networks
nts etc.), an abstract graph of the deployment area and QoS constraints to generate appropriate logical topologies. WIND starts with the set of network elements to be deployed (Nod...
R. Raghuraman, Sridhar Iyer
HPCA
1998
IEEE
15 years 11 months ago
The Impact of Data Transfer and Buffering Alternatives on Network Interface Design
The explosive growth in the performance of microprocessors and networks has created a new opportunity to reduce the latency of fine-grain communication. Microprocessor clock speed...
Shubhendu S. Mukherjee, Mark D. Hill