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» Designing hardware with dynamic memory abstraction
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JRTIP
2008
249views more  JRTIP 2008»
14 years 9 months ago
Model-based mapping of reconfigurable image registration on FPGA platforms
Abstract Image registration is a computationally intensive application in the medical imaging domain that places stringent requirements on performance and memory management efficie...
Mainak Sen, Yashwanth Hemaraj, William Plishker, R...
DATE
2009
IEEE
176views Hardware» more  DATE 2009»
15 years 4 months ago
Single ended 6T SRAM with isolated read-port for low-power embedded systems
Abstract— This paper presents a six-transistor (6T) singleended static random access memory (SE-SRAM) bitcell with an isolated read-port, suitable for low-Î and low-power embedd...
Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Sara...
ICES
2001
Springer
78views Hardware» more  ICES 2001»
15 years 2 months ago
Embryonics: Artificial Cells Driven by Artificial DNA
Abstract. Embryonics is a long-term research project attempting to draw inspiration from the biological process of ontogeny, to implement novel digital computing machines endowed w...
Lucian Prodan, Gianluca Tempesti, Daniel Mange, An...
DATE
2010
IEEE
161views Hardware» more  DATE 2010»
15 years 2 months ago
BISD: Scan-based Built-In self-diagnosis
Abstract—Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may...
Melanie Elm, Hans-Joachim Wunderlich
ICCD
2005
IEEE
176views Hardware» more  ICCD 2005»
15 years 6 months ago
A Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
Shrirang M. Yardi, Karthik Channakeshava, Michael ...