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» Designing systems-on-chip using cores
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IPPS
2007
IEEE
15 years 7 months ago
Improving Scalability of OpenMP Applications on Multi-core Systems Using Large Page Support
Modern multi-core architectures have become popular because of the limitations of deep pipelines and heating and power concerns. Some of these multi-core architectures such as the...
Ranjit Noronha, Dhabaleswar K. Panda
MONET
2002
162views more  MONET 2002»
15 years 1 months ago
AMRoute: Ad Hoc Multicast Routing Protocol
The Ad hoc Multicast Routing protocol (AMRoute) presents a novel approach for robust IP Multicast in mobile ad hoc networks by exploiting user-multicast trees and dynamic logical c...
Jason Xie, Rajesh R. Talpade, Anthony McAuley, Min...
DATE
2009
IEEE
127views Hardware» more  DATE 2009»
15 years 8 months ago
Process variation aware thread mapping for Chip Multiprocessors
Abstract—With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiproce...
Shengyan Hong, Sri Hari Krishna Narayanan, Mahmut ...
MICRO
2010
IEEE
172views Hardware» more  MICRO 2010»
14 years 11 months ago
Architectural Support for Fair Reader-Writer Locking
Abstract--Many shared-memory parallel systems use lockbased synchronization mechanisms to provide mutual exclusion or reader-writer access to memory locations. Software locks are i...
Enrique Vallejo, Ramón Beivide, Adriá...
174
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ICPP
2009
IEEE
14 years 11 months ago
Using Coherence Information and Decay Techniques to Optimize L2 Cache Leakage in CMPs
This paper evaluates several techniques to save leakage in CMP L2 caches by selectively switching off the less used lines. We primarily focus on private snoopy L2 caches. In this c...
Matteo Monchiero, Ramon Canal, Antonio Gonzá...