1226 search results - page 126 / 246 » Designing systems-on-chip using cores |
102
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ICALP
2009
Springer
16 years 1 months ago
2009
Springer
The IEEE standardized Property Specification Language, PSL for short, extends the well-known linear-time temporal logic LTL with so-called semi-extended regular expressions. PSL an...
112
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SC
2009
ACM
15 years 8 months ago
2009
ACM
This paper presents a dynamic task scheduling approach to executing dense linear algebra algorithms on multicore systems (either shared-memory or distributed-memory). We use a tas...
109
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SC
2009
ACM
15 years 8 months ago
2009
ACM
Existing cache partitioning schemes are designed in a manner oblivious to the implicit processor partitioning enforced by the operating system. This paper examines an operating sy...
DATE
2008
IEEE
15 years 8 months ago
2008
IEEE
Cross-trigger, the mechanism to trigger activities in one debug entity from debug events happened in another debug entity, is a very useful technique for debugging applications in...
109
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ISCAS
2007
IEEE
15 years 7 months ago
2007
IEEE
— In this paper we present the Collaborative Routing Architecture (CRA), a routing architecture specially designed to achieve high efficiency in hardware and competitive delay p...