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» Designing systems-on-chip using cores
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GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
15 years 6 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
CF
2011
ACM
14 years 1 months ago
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazal...
ISCA
2012
IEEE
333views Hardware» more  ISCA 2012»
13 years 3 months ago
Reducing memory reference energy with opportunistic virtual caching
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
Arkaprava Basu, Mark D. Hill, Michael M. Swift
ICPP
2009
IEEE
15 years 8 months ago
Bank-aware Dynamic Cache Partitioning for Multicore Architectures
Abstract—As Chip-Multiprocessor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single c...
Dimitris Kaseridis, Jeffrey Stuecheli, Lizy K. Joh...
WOTUG
2007
15 years 2 months ago
A Process Oriented Approach to USB Driver Development
Abstract. Operating-systems are the core software component of many modern computer systems, ranging from small specialised embedded systems through to large distributed operating-...
Carl G. Ritson, Fred R. M. Barnes