1226 search results - page 176 / 246 » Designing systems-on-chip using cores |
108
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HIPEAC
2009
Springer
15 years 8 months ago
2009
Springer
Process variations, which lead to timing and power variations across identically-designed components, have been identified as one of the key future design challenges by the semico...
128
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MICRO
2009
IEEE
15 years 8 months ago
2009
IEEE
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
112
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IEEEPACT
2008
IEEE
15 years 7 months ago
2008
IEEE
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
ISLPED
2004
ACM
15 years 6 months ago
2004
ACM
Increasing demand for larger high-performance applications requires developing more complex systems with hundreds of processing cores on a single chip. To allow dynamic voltage sc...
123
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CAISE
2004
Springer
15 years 6 months ago
2004
Springer
This paper describes an ontology for enterprise modelling, The ontology has enabled conceptual integration of two different modelling methodologies, one based on UEML (Unified Ente...