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» Designing systems-on-chip using cores
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POPL
2008
ACM
16 years 1 months ago
Engineering formal metatheory
Machine-checked proofs of properties of programming languages have become a critical need, both for increased confidence in large and complex designs and as a foundation for techn...
Arthur Charguéraud, Benjamin C. Pierce, Bri...
PPOPP
2006
ACM
15 years 7 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
ESAS
2004
Springer
15 years 6 months ago
Public Key Cryptography in Sensor Networks - Revisited
The common perception of public key cryptography is that it is complex, slow and power hungry, and as such not at all suitable for use in ultra-low power environments like wireless...
Gunnar Gaubatz, Jens-Peter Kaps, Berk Sunar
ASPLOS
2008
ACM
15 years 3 months ago
Tapping into the fountain of CPUs: on operating system support for programmable devices
The constant race for faster and more powerful CPUs is drawing to a close. No longer is it feasible to significantly increase the speed of the CPU without paying a crushing penalt...
Yaron Weinsberg, Danny Dolev, Tal Anker, Muli Ben-...
ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
15 years 3 months ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...