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» Designing systems-on-chip using cores
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FMCAD
2006
Springer
15 years 5 months ago
Design for Verification of the PCI-X Bus
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Haja Moinudeen, Ali Habibi, Sofiène Tahar
HOTI
2008
IEEE
15 years 7 months ago
NoC with Near-Ideal Express Virtual Channels Using Global-Line Communication
As processor core counts increase, networks-on-chip (NoCs) are becoming an increasingly popular interconnection fabric due to their ability to supply high bandwidth. However, NoCs...
Tushar Krishna, Amit Kumar 0002, Patrick Chiang, M...
MVA
2007
196views Computer Vision» more  MVA 2007»
15 years 2 months ago
Fingerprint Verification Using Perturbation Method
This paper describes a new, powerful technique of fingerprint verification based on a perturbation method. The proposed method consists of four parts. The first part performs loca...
Satoshi Otaka, Yoshihisa Nishiyama, Takahiro Hatan...
NSDI
2010
15 years 2 months ago
Prophecy: Using History for High-Throughput Fault Tolerance
Byzantine fault-tolerant (BFT) replication has enjoyed a series of performance improvements, but remains costly due to its replicated work. We eliminate this cost for read-mostly ...
Siddhartha Sen, Wyatt Lloyd, Michael J. Freedman
GLVLSI
2005
IEEE
186views VLSI» more  GLVLSI 2005»
15 years 7 months ago
An FPGA design of AES encryption circuit with 128-bit keys
This paper addresses a pipelined partial rolling (PPR) architecture for the AES encryption. The key technique is the PPR architecture, which is suitable for FPGA implementation. U...
Hui Qin, Tsutomu Sasao, Yukihiro Iguchi