1226 search results - page 83 / 246 » Designing systems-on-chip using cores |
108
click to vote
DATE
2003
IEEE
15 years 6 months ago
2003
IEEE
System-on-chip (SoC) designs use bus protocols for high performance data transfer among the Intellectual Property (IP) cores. These protocols incorporate advanced features such as...
104
click to vote
DATE
2007
IEEE
15 years 7 months ago
2007
IEEE
— Recent efforts to address microprocessor power dissipation through aggressive supply voltage scaling and power management require that designers be increasingly cognizant of po...
ICS
2009
Tsinghua U.
15 years 8 months ago
2009
Tsinghua U.
The speed gap between processor and memory continues to limit performance. To address this problem, we explore the potential of eliminating Zero Loads—loads accessing memory loc...
181
click to vote
ISCA
2011
IEEE
14 years 5 months ago
2011
IEEE
Since 2005, processor designers have increased core counts to exploit Moore’s Law scaling, rather than focusing on single-core performance. The failure of Dennard scaling, to wh...
218
click to vote
ASPDAC
2012
ACM
13 years 9 months ago
2012
ACM
— The Dark Silicon Age kicked off with the transition to multicore and will be characterized by a wild chase for seemingly ever-more insane architectural designs. At the heart o...