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» Detailing Architectural Design in the Tropos Methodology
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DAC
1997
ACM
15 years 3 months ago
Formal Verification of a Superscalar Execution Unit
Abstract. Many modern systems are designed as a set of interconnected reactive subsystems. The subsystem verification task is to verify an implementation of the subsystem against t...
Kyle L. Nelson, Alok Jain, Randal E. Bryant
DAC
1998
ACM
16 years 25 days ago
A Case Study in Embedded System Design: An Engine Control Unit
A number of techniques and software tools for embedded system design have been recently proposed. However, the current practice in the designer community is heavily based on manua...
Alberto L. Sangiovanni-Vincentelli, Antonino Damia...
DAC
1997
ACM
15 years 4 months ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...
DAC
1999
ACM
15 years 4 months ago
Parallel Mixed-Level Power Simulation Based on Spatio-Temporal Circuit Partitioning
: In this work we propose a technique for spatial and temporal partitioning of a logic circuit based on the nodes activity computed by using a simulation at an higher level of ion....
Mauro Chinosi, Roberto Zafalon, Carlo Guardiani
CODES
2001
IEEE
15 years 3 months ago
Evaluating register file size in ASIP design
Interest in synthesis of Application Specific Instruction Set Processors or ASIPs has increased considerably and a number of methodologies have been proposed for ASIP design. A ke...
Manoj Kumar Jain, Lars Wehmeyer, Stefan Steinke, P...