107 search results - page 9 / 22 » Detailing Architectural Design in the Tropos Methodology |
DAC
2000
ACM
16 years 25 days ago
2000
ACM
Leading-edge systems-on-chip (SoC) being designed today could reach 20 Million gates and 0.5 to 1 GHz operating frequency. In order to implement such systems, designers are increa...
ERSA
2008
15 years 1 months ago
2008
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
ICCD
2006
IEEE
15 years 8 months ago
2006
IEEE
— Caches, block memories, predictors, state tables, and other forms of on-chip memory are continuing to consume a greater portion of processor designs with each passing year. Mak...
DAC
2000
ACM
16 years 25 days ago
2000
ACM
Substrate noise caused by large digital circuits will degrade the performance of analog circuits located on the same substrate. To simulate this performance degradation, the total...
COMPSAC
1999
IEEE
15 years 4 months ago
1999
IEEE
As the complexity of software systems increases, so need for a good mechanism of abstraction. architecture design is an abstraction, hiding an immense amount of details about the ...