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115
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ICS
1998
Tsinghua U.
15 years 7 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
ICPP
1997
IEEE
15 years 7 months ago
How Much Does Network Contention Affect Distributed Shared Memory Performance?
Most of recent research on distributed shared memory (DSM)systems have focused on either careful design of node controllersor cache coherenceprotocols. Whileevaluating these desig...
Donglai Dai, Dhabaleswar K. Panda
PDIS
1993
IEEE
15 years 7 months ago
Log-Based Directory Resolution in the Coda File System
semantic knowledge all concurrent partitionedAbstract updates to an object must be treated as conflicting, andOptimistic replication is an important technique for merged manually b...
Puneet Kumar, Mahadev Satyanarayanan
CONCUR
1992
Springer
15 years 7 months ago
On the Semantics of Petri Nets
Petri Place/Transition (PT) nets are one of the most widely used models of concurrency. However, they still lack, in our view, a satisfactory semantics: on the one hand the "...
José Meseguer, Ugo Montanari, Vladimiro Sas...
128
Voted
ASAP
2007
IEEE
157views Hardware» more  ASAP 2007»
15 years 7 months ago
Automatic Generation and Optimisation of Reconfigurable Financial Monte-Carlo Simulations
Monte-Carlo simulations are used in many applications, such as option pricing and portfolio evaluation. Due to their high computational load and intrinsic parallelism, they are id...
David B. Thomas, Jacob A. Bower, Wayne Luk