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DAC
1997
ACM
15 years 6 months ago
Safe BDD Minimization Using Don't Cares
In many computer-aided design tools, binary decision diagrams (BDDs) are used to represent Boolean functions. To increase the efficiency and capability of these tools, many algor...
Youpyo Hong, Peter A. Beerel, Jerry R. Burch, Kenn...
DAC
1996
ACM
15 years 6 months ago
Bit-Level Analysis of an SRT Divider Circuit
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
Randal E. Bryant
DAC
1994
ACM
15 years 6 months ago
HSIS: A BDD-Based Environment for Formal Verification
Functional and timing verification are currently the bottlenecks in many design efforts. Simulation and emulation are extensively used for verification. Formal verification is now...
Adnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin...
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CSR
2006
Springer
15 years 5 months ago
Extended Resolution Proofs for Conjoining BDDs
We present a method to convert the construction of binary decision diagrams (BDDs) into extended resolution proofs. Besides in proof checking, proofs are fundamental to many applic...
Carsten Sinz, Armin Biere
UAI
2008
15 years 3 months ago
Identifying reasoning patterns in games
We present an algorithm that identifies the reasoning patterns of agents in a game, by iteratively examining the graph structure of its Multi-Agent Influence Diagram (MAID) repres...
Dimitrios Antos, Avi Pfeffer