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99
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ISCAS
2007
IEEE
138views Hardware» more  ISCAS 2007»
15 years 9 months ago
A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement
Abstract—This paper presents a high-speed digital feedforward Delta-Sigma Modulator which relaxes timing requirement for the Dynamic Element Matching (DEM) algorithm. By making t...
Sunwoo Kwon, Un-Ku Moon
107
Voted
ITC
1996
IEEE
107views Hardware» more  ITC 1996»
15 years 6 months ago
Digital Integrated Circuit Testing using Transient Signal Analysis
A novel approach to testing CMOS digital circuits is presented that is based on an analysis of IDD switching transients on the supply rails and voltage transients at selected test...
James F. Plusquellic, Donald M. Chiarulli, Steven ...
ASPLOS
1996
ACM
15 years 6 months ago
Exploiting Dual Data-Memory Banks in Digital Signal Processors
Over the past decade, digital signal processors (DSPs) have emerged as the processors of choice for implementing embedded applications in high-volume consumer products. Through th...
Mazen A. R. Saghir, Paul Chow, Corinna G. Lee
110
Voted
CASES
2001
ACM
15 years 6 months ago
The very portable optimizer for digital signal processors
Although retargetability has been a major design concern for many compilers, retargetability is a vitally important issue for Digital Signal Processors(DSPs) because the architect...
Sungjoon Jung, Yunheung Paek
113
Voted
ETS
2010
IEEE
150views Hardware» more  ETS 2010»
15 years 1 months ago
Predicting dynamic specifications of ADCs with a low-quality digital input signal
— A new method is presented to test dynamic parameters of Analogue-to-Digital Converters (ADC). A noisy and nonlinear pulse is applied as the test stimulus, which is suitable for...
Xiaoqin Sheng, Vincent Kerzerho, Hans G. Kerkhoff