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106
Voted
FPGA
2009
ACM
482views FPGA» more  FPGA 2009»
15 years 2 months ago
A 17ps time-to-digital converter implemented in 65nm FPGA technology
This paper presents a new architecture for time-to-digital conversion enabling a time resolution of 17ps over a range of 50ns with a conversion rate of 20MS/s. The proposed archit...
Claudio Favi, Edoardo Charbon
ISSS
1998
IEEE
124views Hardware» more  ISSS 1998»
15 years 1 months ago
Data-Path Synthesis of VLIW Video Signal Processors
This paper describes a methodology for synthesizing the data-path of a Very Long Instruction Word (VLIW) based Video Signal Processor (VSP). Offering both performance and programm...
Zhao Wu, Wayne Wolf
72
Voted
WWW
2008
ACM
15 years 10 months ago
Extraction and mining of an academic social network
This paper addresses several key issues in extraction and mining of an academic social network: 1) extraction of a researcher social network from the existing Web; 2) integration ...
Jie Tang, Jing Zhang, Limin Yao, Juan-Zi Li
80
Voted
MM
2004
ACM
139views Multimedia» more  MM 2004»
15 years 3 months ago
MobShare: controlled and immediate sharing of mobile images
In this paper we describe the design and implementation of a mobile phone picture sharing system MobShare that enables immediate, controlled, and organized sharing of mobile pictu...
Risto Sarvas, Mikko Viikari, Juha Pesonen, Hanno N...
96
Voted
IFIP
2001
Springer
15 years 2 months ago
An Evolutionary Approach for Pareto-optimal Configurations in SOC Platforms
: One of the most important problems in SOC platforms design is that of defining strategies for tuning the parameters of a parameterized system so as to obtain the Pareto-optimal s...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi