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IPPS
2007
IEEE
15 years 9 months ago
A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
Christopher Claus, Florian Helmut Müller, Joh...
130
Voted
IPPS
2007
IEEE
15 years 9 months ago
A Comparative Study of Parallel Metaheuristics for Protein Structure Prediction on the Computational Grid
A comparative study of parallel metaheuristics executed in grid environments is proposed, having as case study a genetic algorithm, a simulated annealing algorithm and a random se...
Alexandru-Adrian Tantar, Nouredine Melab, El-Ghaza...
151
Voted
IPPS
2007
IEEE
15 years 9 months ago
Reconfigurable Architecture for Biological Sequence Comparison in Reduced Memory Space
DNA sequence alignment is a very important problem in bioinformatics. The algorithm proposed by Smith-Waterman (SW) is an exact method that obtains optimal local alignments in qua...
Azzedine Boukerche, Jan Mendonca Correa, Alba Cris...
133
Voted
IPPS
2007
IEEE
15 years 9 months ago
Knowledge and Cache Conscious Algorithm Design and Systems Support for Data Mining Algorithms
The knowledge discovery process is interactive in nature and therefore minimizing query response time is imperative. The compute and memory intensive nature of data mining algorit...
Amol Ghoting, Gregory Buehrer, Matthew Goyder, Shi...
137
Voted
IPPS
2007
IEEE
15 years 9 months ago
Packet Reordering in Network Processors
Network processors today consists of multiple parallel processors (microengines) with support for multiple threads to exploit packet level parallelism inherent in network workload...
S. Govind, R. Govindarajan, Joy Kuri