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126
Voted
HPCA
2007
IEEE
16 years 4 months ago
2007
IEEE
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
137
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HPDC
2007
IEEE
15 years 10 months ago
2007
IEEE
Utility functions can be used to represent the value users attach to job completion as a function of turnaround time. Most previous scheduling research used simple synthetic repre...
122
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SPAA
2003
ACM
15 years 9 months ago
2003
ACM
Recent research on processor microarchitecture suggests using instruction criticality as a metric to guide hardware control policies. Fields et al. [3, 4] have proposed a directed...
126
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SIGGRAPH
2000
ACM
15 years 8 months ago
2000
ACM
Pomegranate is a parallel hardware architecture for polygon rendering that provides scalable input bandwidth, triangle rate, pixel rate, texture memory and display bandwidth while...
145
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EUROPAR
2008
Springer
15 years 5 months ago
2008
Springer
Abstract. Many advances in grid resource management are still required to realize the grid computing vision of the integration of a worldwide computing infrastructure for scientifi...