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HPCA
2003
IEEE
16 years 6 months ago
Caches and Hash Trees for Efficient Memory Integrity
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, M...
HPCA
2001
IEEE
16 years 6 months ago
Performance of Hardware Compressed Main Memory
A new memory subsystem called Memory Expansion Technology (MXT) has been built for compressing main memory contents. MXT effectively doubles the physically available memory. This ...
Bülent Abali, Dan E. Poff, Hubertus Franke, T...
HPCA
2001
IEEE
16 years 6 months ago
DRAM Energy Management Using Software and Hardware Directed Power Mode Control
While there have been several studies and proposals for energy conservation for CPUs and peripherals, energy optimization techniques for selective operating mode control of DRAMs ...
Victor Delaluz, Mahmut T. Kandemir, Narayanan Vija...
HPCA
2001
IEEE
16 years 6 months ago
Data-Flow Prescheduling for Large Instruction Windows in Out-of-Order Processors
The performance of out-of-order processors increases with the instruction window size. In conventional processors, the effective instruction window cannot be larger than the issue...
Pierre Michaud, André Seznec
OSDI
2008
ACM
16 years 6 months ago
Hunting for Problems with Artemis
Artemis is a modular application designed for analyzing and troubleshooting the performance of large clusters running datacenter services. Artemis is composed of four modules: (1)...
Gabriela F. Cretu-Ciocarlie, Mihai Budiu, Mois&eac...
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