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ITC
2002
IEEE
81views Hardware» more  ITC 2002»
15 years 2 months ago
Design Rewiring Using ATPG
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
DAC
1996
ACM
15 years 1 months ago
A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
Nguyen-Ngoc Bình, Masaharu Imai, Akichika S...
FATES
2006
Springer
15 years 1 months ago
A Test Calculus Framework Applied to Network Security Policies
Abstract. We propose a syntax-driven test generation technique to auly derive abstract test cases from a set of requirements expressed in a linear temporal logic. Assuming that an ...
Yliès Falcone, Jean-Claude Fernandez, Laure...
JISBD
2003
14 years 11 months ago
Using Contextual Logic Programming for Temporal Reasoning
The importance of temporal representation and reasoning is well known to the database community. Examples of such significance are the languages TSQL2 and its follow up, SQL/Tempo...
Vítor Nogueira, Salvador Abreu, Gabriel Dav...
HM
2010
Springer
133views Optimization» more  HM 2010»
14 years 11 months ago
A Hybrid LS-CP Solver for the Shifts and Breaks Design Problem
The problem of designing workforce shifts and break patterns is a relevant employee scheduling problem that arises in many contexts, especially in service industries. The issue is ...
Luca Di Gaspero, Johannes Gärtner, Nysret Mus...