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CODES
2006
IEEE
15 years 6 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
HPDC
2006
IEEE
15 years 5 months ago
Path Grammar Guided Trace Compression and Trace Approximation
Trace-driven simulation is an important technique used in the evaluation of computer architecture innovations. However using it for studying parallel computers and applications is...
Xiaofeng Gao, Allan Snavely, Larry Carter
ICDCS
2006
IEEE
15 years 5 months ago
A Loss and Queuing-Delay Controller for Router Buffer Management
— Active queue management (AQM) in routers has been proposed as a solution to some of the scalability issues associated with TCP’s pure end-to-end approach to congestion contro...
Long Le, Kevin Jeffay, F. Donelson Smith
93
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ICNP
2006
IEEE
15 years 5 months ago
Orthogonal Rendezvous Routing Protocol for Wireless Mesh Networks
— Routing in multi-hop wireless networks involves the indirection from a persistent name (or ID) to a locator. Concepts such as coordinate space embedding help reduce the number ...
Bow-Nan Cheng, Murat Yuksel, Shivkumar Kalyanarama...
ISQED
2006
IEEE
107views Hardware» more  ISQED 2006»
15 years 5 months ago
On Optimizing Scan Testing Power and Routing Cost in Scan Chain Design
— With advanced VLSI manufacturing technology in deep submicron (DSM) regime, we can integrate entire electronic systems on a single chip (SoC). Due to the complexity in SoC desi...
Li-Chung Hsu, Hung-Ming Chen