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CF
2005
ACM
15 years 1 months ago
An efficient wakeup design for energy reduction in high-performance superscalar processors
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
Kuo-Su Hsiao, Chung-Ho Chen
CCS
2004
ACM
15 years 4 months ago
MAC and UML for secure software design
Security must be a first class citizen in the design of large scale, interacting, software applications, at early and all stages of the lifecycle, for accurate and precise policy ...
Thuong Doan, Steven A. Demurjian, T. C. Ting, Andr...
IISWC
2008
IEEE
15 years 5 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
CCGRID
2010
IEEE
15 years 8 days ago
Designing Accelerator-Based Distributed Systems for High Performance
Abstract--Multi-core processors with accelerators are becoming commodity components for high-performance computing at scale. While accelerator-based processors have been studied in...
M. Mustafa Rafique, Ali Raza Butt, Dimitrios S. Ni...
ATAL
2011
Springer
13 years 11 months ago
Online mechanism design for electric vehicle charging
Plug-in hybrid electric vehicles are expected to place a considerable strain on local electricity distribution networks, requiring charging to be coordinated in order to accommoda...
Enrico H. Gerding, Valentin Robu, Sebastian Stein,...