We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Multiple issue of instructions occurs in superscalar and VLIW machines. This paper investigates a third type of machine design, which combines the advantages of code compatibility...
This paper presents ADB, an Alternate Wire Database, suitable for routing, tracing, and browsing in Xilinx Virtex, Virtex-E, Virtex-II, and Virtex-II Pro FPGAs. While mainstream d...
Java applications rely on Just-In-Time (JIT) compilers or adaptive compilers to generate and optimize binary code at runtime to boost performance. In conventional Java Virtual Mac...
We present a performance analysis of an agent-based middleware system we have developed based on "reAgents," remotely executing agents that enhance the performance of cl...