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VLSID
2007
IEEE
126views VLSI» more  VLSID 2007»
16 years 6 months ago
An ECO Technique for Removing Crosstalk Violations in Clock Networks
Crosstalk noise in the clock network of digital circuits is often detected late in the design cycle, sometimes as late as after first silicon. It is therefore necessary to fix cros...
Amit Kumar, Krishnendu Chakrabarty, Chunduri Rama ...
HPCA
2008
IEEE
16 years 6 months ago
Branch-mispredict level parallelism (BLP) for control independence
A microprocessor's performance is fundamentally limited by the rate at which it can resolve branch mispredictions. Control independence (CI) architectures look for useful con...
Kshitiz Malik, Mayank Agarwal, Sam S. Stone, Kevin...
HPCA
2007
IEEE
16 years 6 months ago
Evaluating MapReduce for Multi-core and Multiprocessor Systems
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
Colby Ranger, Ramanan Raghuraman, Arun Penmetsa, G...
CHI
2003
ACM
16 years 6 months ago
iStuff: a physical user interface toolkit for ubiquitous computing environments
The iStuff toolkit of physical devices, and the flexible software infrastructure to support it, were designed to simplify the exploration of novel interaction techniques in the po...
Rafael Ballagas, Meredith Ringel, Maureen C. Stone...
159
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RECOMB
2006
Springer
16 years 6 months ago
Predicting Experimental Quantities in Protein Folding Kinetics Using Stochastic Roadmap Simulation
Abstract. This paper presents a new method for studying protein folding kinetics. It uses the recently introduced Stochastic Roadmap Simulation (SRS) method to estimate the transit...
Tsung-Han Chiang, Mehmet Serkan Apaydin, Douglas L...
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