— Recently power becomes a significant issue in clock network design for high-performance ICs because the clock network consumes a large portion of the total power in the whole s...
This study deals with the Delay-Constrained Minimum Cost Loop Problem (DC-MCLP) of finding several loops from a source node. The DC-MCLP consists of finding a set of minimum cost ...
As computer systems become increasingly internetworked, there is a growing class of distributed realtime embedded (DRE) applications that have characteristics and present challeng...
Joseph P. Loyall, Richard E. Schantz, David Corman...
We propose a new architecture for a content protection system that conceals confidential data and algorithms in an FPGA as electrical circuits. This architecture is designed for a...
We consider the problem of transmission scheduling of data over a wireless fading channel with hard deadline constraints. Our system consists of N users, each with a fixed amount...
Alessandro Tarello, Jun Sun 0007, Murtaza Zafer, E...