473 search results - page 19 / 95 » Dynamic Memory Design for Low Data-Retention Power |
FPGA
2006
ACM
15 years 3 months ago
2006
ACM
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
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ISCAS
2003
IEEE
15 years 5 months ago
2003
IEEE
The width of an interconnect line a ects the total power consumed by a circuit. A tradeo exists, however, between the dynamic power and the short-circuit power in determining the ...
DAC
2011
ACM
13 years 11 months ago
2011
ACM
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
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CF
2005
ACM
15 years 1 months ago
2005
ACM
Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal...
CASES
2007
ACM
15 years 3 months ago
2007
ACM
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...