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HPCA
2012
IEEE
13 years 12 months ago
Power balanced pipelines
Since the onset of pipelined processors, balancing the delay of the microarchitectural pipeline stages such that each microarchitectural pipeline stage has an equal delay has been...
John Sartori, Ben Ahrens, Rakesh Kumar
ISCA
2012
IEEE
261views Hardware» more  ISCA 2012»
13 years 6 months ago
RAIDR: Retention-aware intelligent DRAM refresh
Dynamic random-access memory (DRAM) is the building block of modern main memory systems. DRAM cells must be periodically refreshed to prevent loss of data. These refresh operation...
Jamie Liu, Ben Jaiyen, Richard Veras, Onur Mutlu
ECCV
2002
Springer
16 years 6 months ago
Assorted Pixels: Multi-sampled Imaging with Structural Models
Abstract. Multi-sampled imaging is a general framework for using pixels on an image detector to simultaneously sample multiple dimensions of imaging (space, time, spectrum, brightn...
Shree K. Nayar, Srinivasa G. Narasimhan
SIGMOD
2002
ACM
112views Database» more  SIGMOD 2002»
16 years 4 months ago
Minimal probing: supporting expensive predicates for top-k queries
This paper addresses the problem of evaluating ranked top-? queries with expensive predicates. As major DBMSs now all support expensive user-defined predicates for Boolean queries...
Kevin Chen-Chuan Chang, Seung-won Hwang
ISQED
2009
IEEE
91views Hardware» more  ISQED 2009»
15 years 11 months ago
Variability-aware optimization of nano-CMOS Active Pixel Sensors using design and analysis of Monte Carlo experiments
We propose a novel design flow for mismatch and processvariation aware optimization of nanoscale CMOS Active Pixel Sensor (APS) arrays. As a case study, an 8 × 8 APS array is de...
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos