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RTSS
1998
IEEE
15 years 3 months ago
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
Inki Hong, Gang Qu, Miodrag Potkonjak, Mani B. Sri...
RTSS
1998
IEEE
15 years 3 months ago
Improved Response-Time Analysis Calculations
Schedulability analysis of fixed priority preemptive scheduled systems can be performed by calculating the worst-case response-time of the involved processes. The system is deemed...
Mikael Sjödin, Hans Hansson
ICCAD
1997
IEEE
118views Hardware» more  ICCAD 1997»
15 years 3 months ago
Global interconnect sizing and spacing with consideration of coupling capacitance
This paper presents an efficient approach to perform global interconnect sizing and spacing (GISS) for multiple nets to minimize interconnect delays with consideration of couplin...
Jason Cong, Lei He, Cheng-Kok Koh, David Zhigang P...
ECP
1997
Springer
128views Robotics» more  ECP 1997»
15 years 3 months ago
SINERGY: A Linear Planner Based on Genetic Programming
In this paper we describe SINERGY, which is a highly parallelizable, linear planning system that is based on the genetic programming paradigm. Rather than reasoning about the world...
Ion Muslea
ICS
1993
Tsinghua U.
15 years 3 months ago
Graph Contraction for Physical Optimization Methods: A Quality-Cost Tradeoff for Mapping Data on Parallel Computers
Mapping data to parallel computers aims at minimizing the execution time of the associated application. However, it can take an unacceptable amount of time in comparison with the ...
Nashat Mansour, Ravi Ponnusamy, Alok N. Choudhary,...