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» Dynamic Time Step Control Algorithm Enhancements
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IPPS
2007
IEEE
15 years 8 months ago
A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
Christopher Claus, Florian Helmut Müller, Joh...
ICRA
2002
IEEE
187views Robotics» more  ICRA 2002»
15 years 6 months ago
Trajectory Planning using Reachable-State Density Functions
:This paper presents a trajectory planning algorithm for mobile robots which may be subject to kinodynamic constraints. Using computational methods from noncommutative harmonic ana...
Richard Mason, Joel W. Burdick
GECCO
2006
Springer
151views Optimization» more  GECCO 2006»
15 years 5 months ago
Sporadic model building for efficiency enhancement of hierarchical BOA
This paper describes and analyzes sporadic model building, which can be used to enhance the efficiency of the hierarchical Bayesian optimization algorithm (hBOA) and other advance...
Martin Pelikan, Kumara Sastry, David E. Goldberg
TOG
2002
162views more  TOG 2002»
15 years 1 months ago
Interactive skeleton-driven dynamic deformations
This paper presents a framework for the skeleton-driven animation of elastically deformable characters. A character is embedded in a coarse volumetric control lattice, which provi...
Steve Capell, Seth Green, Brian Curless, Tom Ducha...
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
15 years 11 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...